An industrial control system often includes a programmable logic controller (PLC) for providing coordinated control of industrial control equipment, which includes various elements that are often either sensors for providing inputs to the PLC, or relays for receiving outputs from the PLC, each under the control of an element controller, and each connected to the PLC over a network via a network I/O device. A PLC generally has a processor, a memory, and a number of separate input/output (I/O) modules coupled to the control equipment. The processor is the heart of the PLC and responsible for many PLC functions, such as input scanning, logic solving and output scanning.
As the complexity of industrial systems has increased, the associated PLCs have evolved to utilize embedded software for the coordination of the requisite high-volume and high-precision manufacturing. Industries such as pharmaceutical, chemical, energy and others rely on PLCs that are utilized for sensing, planning complex processes and actuating thousands of times per second through high-speed cameras, light sensors, collision avoidance and detection, robotic devices, motors and the like. These PLCs must not only comply with hard real-time requirements, but must also be able to survive in extreme environments of temperature, pressure, vibration and humidity, while remaining operable for decades without interruption or failure. Throughout the years, embedded software for PLCs has been developed by non-computer experts using domain-specific languages that have been designed and refined by experienced practitioners, manufacturers of automation hardware and software, as well as independent institutions from different industry sectors.
The IEC 61131-3 standard has been widely adopted as the programming standard for PLCs since about 1993, but its languages have been used since the early 1970's. The standard provides a total of five different languages: two textual languages (Instruction List or IL, and Structured Text or ST), two graphical languages (Ladder Diagram or LD, and Function Block Diagram or FBD) and one with both textual and graphical representations (Sequence Function Chart or SFC). Different industry sectors use different languages, or combinations of them, simply because each language has special semantics that facilitate certain automation tasks. These programming languages have been designed to satisfy the needs and increase the productivity of non-computer experts such as electrical, mechanical and chemical engineers.
Flexibility is one of the most important features in industrial PLCs inasmuch as the production requirements change significantly between different products, or different generations of the same product. Therefore, there is an economical and technical motivation to shift from custom architectures and programming languages into flexible off-the-shelf architectures and standardized automation languages.
The adoption of multi-core processors appears to be the next evolutionary step in high-performance control systems, since they offer better energy efficiency, redundancy, consolidation properties and scalable performance than existing systems. Unfortunately, as of today, there is only a very limited understanding on how to compile IEC 61131-3 languages for execution in multi-core processors. US Patent Publication 2011/007749, dated Mar. 31, 2011, describes an initial attempt to introduce PLC systems to the multi-core processor environment. In this arrangement, the various applications associated with the PLC are associated with different processors and operated in parallel. For example, one processor is dedicated to I/O scanning with access to I/O modules, another processor is dedicated to the logic solving that runs the user's program, a third processor is used for communication and a fourth for diagnostics. While this arrangement does utilize multiple processors in parallel, the efficiency of the arrangement is not optimum and there may be considerable periods of time where one or another of the processors is idle while another is over-demanded.
US Patent Publication 2010/0306733 dated Dec. 2, 2010 describes the use of a controller in the form of a general purpose PC with multiple cores. In this case, an automated technique is applied to the data flow program which scans for iterative functionality that allows for the data flow to be partitioned into separate portions. These portions are then distributed across the multiple set of processors to be executed in parallel. Again, while this automatic parallelization of a data flow program is useful in identifying portions that can be assigned to different processors, this partitioning occurs at a relatively high level (i.e., providing a “coarse grain” division), which results in a relatively unbalanced parallelism across the multiple processors.
In this type of analysis, the compilers analyze the program to identify, organize and exploit parallelism by searching for data-independent blocks that can be partitioned and executed in parallel. If a program is written in a slightly obscure or different way, the compiler may fail to recognize one or more locations where partitioning may be applied. Normally, compilers must guarantee that the generated code produces the exact same results that were intended by the programmer. This expected behavior is enforced by the traditional dataflow analysis, which is executed on the compiler's internal representation of the program.
Whenever the dataflow analysis cannot determine if there is a true data dependency, it takes a conservative approach and assumes that a dependency exists, in order to guarantee equivalent semantics in the generated code. In some cases, these data dependencies do not exist in the high-level representation of the program, but have been introduced when translating the program into a lower-level representation that simply understands basic instructions and memory locations.
Thus a need remains for an improved methodology for efficiently implementing PLC programs in a multi-core processor environment.